1. Field of the Invention
The disclosures herein generally relate to a memory circuit, and particularly relate to a nonvolatile memory circuit which is capable of retaining stored data in the absence of a power supply voltage.
2. Description of the Related Art
Nonvolatile semiconductor memory devices, which can retain stored data even when power is turned off, conventionally include flash EEPROM employing a floating gate structure, FeRAM employing a ferroelectric film, MRAMs employing a ferromagnetic film, etc. There is a new type of nonvolatile semiconductor memory device called PermSRAM. PermSRAM uses a MIS (metal-insulating film-semiconductor) transistor as a nonvolatile memory cell (i.e., the basic unit of data storage). The MIS transistor used as a nonvolatile memory cell in PermSRAM has the same structure as ordinary MIS transistors used for conventional transistor functions (e.g., switching function), and do not require a special structure such as a floating gate or a special material such as a ferroelectric material or ferromagnetic material. The absence of such a special structure and special material offers an advantage in cost reduction. PermSRAM was initially disclosed in PCT/JP2003/016143, which was filed on Dec. 17, 2003, the entire contents of which are hereby incorporated by reference.
The MIS transistor used as a nonvolatile memory cell in PermSRAM is configured to experience an irreversible hot-carrier effect on purpose for storage of one-bit data. Here, the irreversible hot-carrier effect refers to the injection of electrons into the oxide film and/or sidewalls. A change in the transistor characteristics caused by a hot-carrier effect represents one-bit data “0” or “1”. Such a change may be detected by sensing a difference in ON current between the nonvolatile-memory-cell MIS transistor and a reference MIS transistor by using a sensing circuit such as a latch circuit.
Data supplied from an external source to a PermSRAM are initially written to the latch circuit. After the writing of data to the latch circuit, a store operation is performed to transfer (copy) the data from the latch circuit to the nonvolatile-memory-cell MIS transistor. Whether the nonvolatile-memory-cell MIS transistor experiences a hot-carrier effect in the store operation depends on whether the data stored in the latch circuit is 0 or 1. A recall operation is subsequently performed to read the data stored in the nonvolatile-memory-cell MIS transistor. If the nonvolatile-memory-cell MIS transistor has experienced a hot-carrier effect in the store operation, an ON current smaller than the ON current of the reference MIS transistor is detected in the recall operation to flow through the nonvolatile-memory-cell MIS transistor. If the nonvolatile-memory-cell MIS transistor has not experienced a hot-carrier effect in the store operation, an ON current larger than the reference ON current is detected in the recall operation to flow through the nonvolatile-memory-cell MIS transistor. The latch circuit latches data that is either “0” or “1” depending on whether the ON current of the nonvolatile-memory-cell MIS transistor is larger or smaller than the reference ON current.
Since PermSRAM actively utilizes hot carriers having high-kinetic energy, impact ionization is likely to occur. In general, an electron having enough kinetic energy in a semiconductor material can knock a bound electron out of its bound state to create an electron-hole pair.
FIG. 1 is an illustrative drawing for explaining an effect of impact ionization. During a store operation in a PermSRAM, a drain 12 is set to a high potential such as 5 V, and a source 11 is set to a ground potential, for example. A gate 14 may be set to 1.8 V, which is half the voltage between the source node and drain node of the transistor that is subjected to a hot-carrier effect.
When hot electrons having high-kinetic energy flow as shown by an arrow A through the channel from the source to the drain, impact ionization occurs at the channel/drain injunction to create electron-hole pairs. The created holes flow in a substrate 10 as shown in an arrow B to generate an electric current running toward contacts which are fixed to an externally applied substrate potential. A voltage equal to a product of this electric current and the resistance of the substrate 10 appears between the source 11 and the externally applied substrate potential. This voltage serves to reduce the threshold voltage of the transistor and also the threshold voltages of neighboring transistors. There is thus a risk that the circuit does not function properly as designed.
Accordingly, there is a need for a nonvolatile memory cell that utilizes a hot-carrier effect for storage of data while suppressing an adverse effect caused by impact ionization.